The other method of obtaining the probability of a fault tree output event is by statistical methods, which include simulation. The various logic gates are simulated on a computer, even to incorporating a repair time generator with a randomly generated fault sequence. The simulator then traces the mock use of the system for a large number of computer generated faults.

One severe disadvantage of this method of evaluation is the large number of trials required. The probabilities to be demonstrated in the fault tree may range to 10-10 and below. For verification of a probability of 10-e at 10% confidence 105,000 trials are required if no output fault occurs in the simulated trials. For 90% confidence 2,300,000 trials would be needed However if one fault occurs in the simulated trials, 530,000 and 3,900,000 trials would be needed, respectively, to obtain 10 and 90% confidence in the 10~6 result produced.

Then, for a computer taking 10 jusec for each increment of the fault tree, where the fault tree requires 104 increments per trial, a million trials would

take 28 hr of computer time. Such a calculation is prohibitively expensive. For this reason, new Monte Carlo methods are being produced to obtain simulated statistical probabilities.